Skip to content
Najath Akram

Where the work happened

Ten years in radio, the last six shipping O-RAN radio units.

Airspan Networks

Houston, TX
  • Signal Processing Engineer2025-Present

System and verification modeling for multiband LTE and 5G NR O-RAN radio units. I look after the golden models of the downlink, uplink, low-PHY, and PRACH chains: fixed-point models that run the same arithmetic as the vendor IP C-models, versioned, and used to generate the RTL and fronthaul test vectors firmware is signed off against. Carriers from 3 to 100 MHz, FDD and TDD. I also generate the 3GPP test waveforms that the system test, RF test, firmware verification, and software teams work from, each in the format that team uses, and help identify issues when something does not line up.

  • The uplink EVM analyzer and the fronthaul power tool live under Systems.
  • Some early 6G: system modeling, and gap analysis against where the standards currently sit.

Jabil

Warren, NJ and Houston, TX
  • Principal Wireless Systems Design Engineer2023-2024
  • Lead Wireless Systems Design Engineer2021-2023
  • Senior FPGA Design Engineer2020-2021

Four years of O-RAN radios, single band to tri band, promoted twice along the way. I ran software and firmware workstreams, defined NR implementation requirements, and wrote the architecture and implementation documents the digital design team built to. In 2022 that included CFR cancellation-pulse analysis delivered to a major OpenRAN program partner. I also spent a fair amount of time in front of customers explaining passive intermodulation, which taught me more about what a radio has to be than any specification did.

Florida International University

Miami, FL
  • Graduate Research Assistant, PhD2018-2020

PhD research on hardware-efficient massive MIMO. I built a 28 GHz digital beamforming array receiver that used one ADC per four antennas instead of one per antenna, and a multidimensional scheme that halved the ADC count for 2D arrays. The lab had a few RFSoC boards and quite a lot of patience.

MathWorks

Natick, MA
  • Engineering Intern2019

A summer on HDL Verifier workflows and Ethernet PHY IP across a few FPGA families. Two awards in the intern hackathon.

The University of Akron

Akron, OH
  • Graduate Research Assistant2016-2018

DARPA, NSF, and AFRL funded research on multidimensional DSP for RF systems. This is where I first fell for approximate DFTs and multidimensional sigma-delta ADCs, and where I learned that a good algorithm and a bad one can look identical on paper and very different on silicon.

Synopsys

Colombo, Sri Lanka
  • Product Verification Intern2015

First exposure to ASIC verification: Spyglass, SystemVerilog, VHDL, and a great deal of Perl.